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EUROSOI Landmark Publications
| Title | First Author | Innovation keys | Contact | File |
|---|---|---|---|---|
| THRESHOLD VOLTAGE OF THIN-FILM SILICON-ON-INSULATOR (SOI) MOSFETS | LIM HK | -- |  |
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| WAFER BONDING FOR SILICON-ON-INSULATOR TECHNOLOGIES | LASKY JB | -- | |
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| DOUBLE-GATE SILICON-ON-INSULATOR TRANSISTOR WITH VOLUME INVERSION - A NEW DEVICE WITH GREATLY ENHANCED PERFORMANCE | BALESTRA F | -- | balestra@enserg.fr | |
| Double-Gate Silicon-on-Insulator Transistor with Volume Inversion: a New Device with Greatly Enhanced Performance | Francis Balestra | -- | balestra@enserg.fr | |
| BONDING OF SILICON-WAFERS FOR SILICON-ON-INSULATOR | MASZARA WP | -- | |
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| ADJUSTABLE CONFINEMENT OF THE ELECTRON GAS IN DUAL-GATE SILICON-ON-INSULATOR MOSFETs | Sorin Cristoloveanu | -- | sorin@enserg.fr | |
| SILICON-ON-INSULATOR "GATE- ALL-AROUND DEVICE" | J.P. Colinge | -- | colinge@ece.ucdavis.edu | |
| Hysteresis and critical phenomena in silicon on insulator MOSFETs | Thierry Ouisse | -- | Thierry.Ouisse@enserg.fr | |
| Oxygen-related activity and other specific electrical properties of SIMOX | Sorin Cristoloveanu | -- | sorin@enserg.fr | |
| Optimization of SIMOX for VLSI by Electrical Characterization | Dimitris E. Ioannou | -- | dioannou@gmu.edu | |
| Properties of Ultra-Thin Wafer-Bonded Silicon-on-Insulator MOSFETs | Baquer Mazhari | -- | baquer@iitk.ac.in | |
| SCALING THE SI MOSFET - FROM BULK TO SOI TO BULK | YAN RH | -- | |
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| INFLUENCE OF SERIES RESISTANCES AND INTERFACE COUPLING ON THE TRANSCONDUCTANCE OF FULLY-DEPLETED SILICON-ON-INSULATOR MOSFETs | Thierry Ouisse | -- | Thierry.Ouisse@enserg.fr | |
| Point-Contact Pseudo-MOSFET for In-Situ Characterization of As-Grown Silicon-on-Insulator Wafers | Sorin Cristoloveanu | -- | sorin@enserg.fr | |
| Electrical Characterization of Silicon-On-Insulator Materials and Devices | Sorin Cristoloveanu | -- | sorin@enserg.fr | |
| SILICON-ON-INSULATOR MATERIAL TECHNOLOGY | BRUEL M | -- | |
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| THE LOW-FREQUENCY NOISE BEHAVIOUR OF SILICON-ON-INSULATOR TECHNOLOGIES | E. SIMOEN | -- | simoen@imec.be | |
| CMOS scaling into the nanometer regime | Taur Y | -- | |
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| Subband structure and anomalous valley splitting in ultra-thin silicon-on-insulator MOSFETs | Thierry Ouisse | -- | Thierry.Ouisse@enserg.fr | |
| ULTIMATE MOSFETs ON SOI: ULTRA THIN, SINGLE GATE, DOUBLE GATE, OR GROUND PLANE | Sorin Cristoloveanu | -- | sorin@enserg.fr | |
| FinFET - A self-aligned double-gate MOSFET scalable to 20 nm | Hisamoto D | -- | |
|
| A Review of the Pseudo-MOS Transistor in SOI Wafers: Operation, Parameter Extraction, and Applications | Sorin Cristoloveanu | -- | sorin@enserg.fr | |
| Device scaling limits of Si MOSFETs and their application dependencies | Frank DJ | -- | |
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| Electron transport in silicon-on-insulator devices | Francisco Gámiz | -- | fgamiz@ugr.es | |
| Monte Carlo simulation of double-gate silicon-on-insulator inversion layers: The role of volume inversion | Francisco Gámiz | -- | fgamiz@ugr.es | |
| The Four-Gate Transistor | Sorin Cristoloveanu | -- | sorin@enserg.fr | |
| New Mechanism of Body Charging in Partially Depleted SOI-MOSFETs with Ultra-Thin Gate Oxides | Jérémy Pretet | -- | jeremy.pretet@st.com | |
| Monte Carlo simulation of electron mobility in silicon-on-insulator structures | Francisco Gámiz | -- | fgamiz@ugr.es | |
| Coulomb scattering model for ultrathin silicon-on-insulator inversion layers | Francisco Gámiz | -- | fgamiz@ugr.es | |
| Strained-Si?SiGe-on-insulator inversion layers: The role of strained-Si layer thickness on electron mobility | Francisco Gámiz | -- | fgamiz@ugr.es | |
| Revision of the Standard Hydrodynamic Transport Model for SOI Simulation | Markus Gritsch | -- | gritsch@iue.tuwien.ac.at | |
| Ultimately Thin Double-Gate SOI MOSFETs | Thomas Ernst | -- | ThomasErnst@gmx.net | |
| Frontiers of silicon-on-insulator | G. K. Celler | -- | gceller@soitecusa.com | |
| "Linear Kink Effect" Induced by Electron Valence Band Tunneling in Ultrathin Gate Oxide Bulk and SOI MOSFETs | A. Mercha | -- | |
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| Electron mobility in double gate silicon on insulator transistors: Symmetric-gate versus asymmetric-gate configuration | Francisco Gámiz | -- | fgamiz@ugr.es | |
| A specific floating-body efect in fully depleted SOI MOSFETs with ultra-thin gate oxide | M. Cassé | -- | |
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| Advanced SOI MOSFETs with buried alumina and ground plane: self-heating and short-channel efects | K. Oshima | -- | |
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| New SOI lateral power devices with trench oxide | J.M. Park | -- | |
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| Silicon-on-Nothing MOSFETs: Performance, Short-Channel Effects, and Backgate Coupling | Jérémy Pretet | -- | jeremy.pretet@st.com | |
| Electron mobility in ultrathin silicon-on-insulator layers at 4.2 K | Mika Prunnila | -- | Mika.Prunnila@vtt.fi | |
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EUROSOI 2011 Granada |
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EUROSOI 2010 Grenoble |
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EUROSOI 2009 Chalmers |
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EUROSOI 2008 Cork |
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EUROSOI 2007 Leuven |
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EUROSOI 2006 Grenoble |
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EUROSOI 2005 Granada |
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