News
Showing all news
| CPV Consortium Elects New Board Members with Exceptional Solar Industry Backgrounds |
25/02/2010 |
|
The CPV Consortium, a non-profit concentrator photovoltaic (CPV) solar industry organization, is proud to announce the addition of two respected solar industry veterans to its board: Andreas Bett, PhD and Martha Symko-Davies, PhD. The appointments come at a time when the Consortium has commissioned the University of California, Berkeley to undertake an economic analysis of the CPV carbon footprint, cradle-to-cradle.
The CPV Consortium is dedicated to supporting the development and optimizing the success of CPV technology as a mainstream energy source for distributed and utility-scale deployments. It is a global organization comprised of members from all segments of the CPV industry including system manufacturers, cell suppliers, power generators, tracker suppliers, system integrators, project developers, universities and research laboratories. See more.
|
| Concentrix Solar enters the US market with megawatt CPV deployment at a Chevron facility |
24/02/2010 |
|
Concentrix Solar, a leading supplier of Concentrator Photovoltaic (CPV) systems and a new division of the Soitec Group (Euronext Paris), the world’s leading supplier of engineered substrates, announced today that it has signed a contract with Chevron Technology Ventures for the deployment of a one megawatt (MW) CPV power plant to be installed at a Chevron Mining facility in Questa, New Mexico, USA. With this announcement, Concentrix Solar confirms full commercial readiness for worldwide deployment, and is paving the way to utility-scale CPV projects. See more.
|
| Skyworks Introduces Family of GaAs and SOI Antenna Switch Modules for 2/3/4G Wireless Broadband and Mobile Handset Applications |
16/02/2010 |
|
Skyworks Solutions, Inc. (NASDAQ:SWKS), an innovator of high reliability analog and mixed signal semiconductors enabling a broad range of end markets, today announced that it has introduced a family of antenna switch modules (ASMs) for 2/3/4G handset and data card platforms using both gallium arsenide (GaAs) as well as silicon on insulator (SOI) technologies. Skyworks products address the three primary switching functions: main antenna, diversity, and band/mode. See more
|
| RF Micro Devices(R) Introduces First Silicon Switches for 3G Smartphones and Other High Performance Applications |
16/02/2010 |
|
RF Micro Devices (Nasdaq: RFMD), a global leader in the design and manufacture of high-performance radio frequency components and compound semiconductor technologies, announced today that the Company has successfully qualified and released its first high power RF CMOS switch using high-resistivity silicon substrates sourced at a leading silicon foundry. RFMD(R) is leveraging this new process technology, as well as patent-pending design and circuit-related technology developed by RFMD, to introduce a product portfolio of high-performance silicon switch-based products for next-generation 3G and 4G smartphones, as well as other cellular handset, wireless infrastructure, wireless local area network (WLAN), CATV/broadband and aerospace and defense applications. See more
|
| TowerJazz and Soitec sign agreement to offer backside illumination platform for high-end image sensors |
02/02/2010 |
|
TowerJazz, the global specialty foundry leader and The Soitec Group (Euronext Paris), the world’s leading supplier of silicon-on-insulator (SOI) and other engineered substrates for the microelectronics industry, announced today that they have signed an agreement that will enable a turn-key solution for high-end backside illuminated (BSI) CMOS image sensors (CIS) for industrial, medical and automotive applications. See more.
|
| Concentrix Solar wins IEC certification for new CPV module CX-75 |
28/01/2010 |
|
Concentrix Solar, a leading supplier of Concentrator Photovoltaic (CPV) systems and a new division of the Soitec Group (Euronext Paris), the world’s supplier of engineered substrates, announced today that the company has received IEC certification 62108 for its CX-75 FLATCON® module generation. The International Electrotechnical Commission (IEC) is the world's leading electrical and electronic standards organization. IEC 62108 is the CPV industry’s standard, ensuring that modules and assemblies are suitable for long-term operation in a wide range of outdoor climates. By producing the CX-75 module in the company’s industry-leading, fully-automated production line in Freiburg, Germany, Concentrix Solar is uniquely able to ensure consistent, highest-precision manufacturing in high volumes – a critical factor in ensuring high nominal AC system efficiency and long-term reliability. See more
|
| CMOS Transitions to 22 and 15 nm |
01/01/2010 |
|
Scaling beyond the 22 nm node is likely to require fully depleted CMOS, either on SOI or bulk wafers. TSV 3-D interconnects and SiC stressors also appear likely to be implemented, while the jury is still out on when vertical finFETs and III-V devices will be widely implemented. See more.
|
| IBM Gains Confidence in 22 nm ETSOI |
15/12/2009 |
|
At the IEDM conference in Baltimore, IBM researchers indicated that a fully depleted CMOS on extremely thin SOI wafers may be the way to go at the 22 nm node. The approach allows reduced short channel effects, and supports gate length scaling to 25 nm and beyond. The fully depleted technology involves Soitec, which supplies wafers with a thin silicon layer on top of the buried oxide. See more.
|
| Soitec Bursts Into Solar Sector |
11/12/2009 |
|
Microelectronics substrate supplier the Soitec Group has announced a major shift into the solar technology sector with an agreement to acquire concentrating solar PV company Concentrix Solar GmbH.
Based in Freiburg, Germany, Concentrix is a 2005 spin-off company from the Fraunhofer Institute for Solar Energy Systems (ISE), and with its 80% share acquisition, Soitec also gains access to the concentrator solar cell technologies from the research institute, which will continue to hold the remaining 20%. Under the terms of the deal, Concentrix is valued at €55 million. See more.
|
| Soitec and CEA-Leti to join forces to speed commercial adoption of 3D integration |
01/12/2009 |
|
The Soitec Group, the world’s leading supplier of engineered substrates for the microelectronics industry, and CEA-Leti, a leading global research center committed to creating and commercializing innovation in micro- and nanotechnologies, today announced plans to expand their collaboration on wafer-to-wafer 3D integration by offering customers a joint, comprehensive industrial solution. The global offer envisioned by the long-term partners begins with process customization for prototype demonstration and will include licensing, both in 200mm and 300mm. See more.
|
| Soitec CEO sees positive momentum in SOI markets |
27/11/2009 |
|
Despite a widening net loss, year-over-year, in the first half of fiscal year 2009-2010, French SOI specialist Soitec SA said it has detected signs of renewed optimism in SOI markets for 2010 and beyond.
For the first half of financial year 2009-2010, Soitec published consolidated sales of 94.2 million euros ($142 million), down 21.7 percent year-on-year. The operating loss amounted to 15.8 million euros ($23.8 million), versus 9.4 million euros ($14.1 million) in the first half of the previous financial year. And, the net loss reached 19.4 million euros ($29.2 million), compared to a loss of 8.0 million euros ($12 million) in the same period of 2008-2009. See more.
|
| Mentor joins SOI Industry Consortium |
13/11/2009 |
|
The SOI Industry Consortium this week announced Mentor Graphics Corp as its newest member, saying that in joining the group the company aims to expand EDA tool and methodology support for SOI (silicon-on-insulator) technology. See more.
|
| Comparing SOI and bulk FinFETs: Performance, manufacturing variability, and cost |
01/11/2009 |
|
As the semiconductor industry looks toward the 22nm technology node, some manufacturers are considering a transition from planar CMOS transistors to the three-dimensional (3D) FinFET device architecture. Relative to planar transistors, FinFETs offer improved channel control and, therefore, reduced short channel effects. While the gate in a planar transistor sits above the channel, the gate of a FinFET wraps around the channel, providing electrostatic control from both sides. See more.
|
| Leti's planar SOI technology suits low power 22nm node |
19/10/2009 |
|
The Electronics and Information Technology Laboratory of the CEA (CEA-Leti) of France claimed that its planar SOI technology meets requirements for low-power 22-nm node devices.
Leti (Grenoble, France) said it has demonstrated that planar SOI is superior to other technologies based on bulk CMOS technology and FinFET architecture. It also highlighted the performances for low-power applications requiring 22-nm technology, such as consumer electronic devices including 4G mobile phones. See more.
|
| Leti’s Planar-SOI Technology Meets Low-Power, 22nm Node Requirements, Supports Development of “Green” Products |
16/10/2009 |
|
Leti, a leading global research center committed to creating and commercializing innovation in micro- and nanotechnologies, today presented results at the SOI Industry Consortium workshop in Leuven, Belgium, that prove SOI-based planar CMOS meets requirements for low-power, 22nm node devices, offering a practical route to further feature shrink and enabling a significant jump for “green” products. See more.
|
| ARM teaches world how to use SOI process technology |
13/10/2009 |
|
ARM is working with the SOI Industry Consortium to run a silicon on insulator (SOI) design seminar.
The company recognises a need to help IC designers understand the significant differences between designing on SOI versus bulk silicon, to achieve power-saving and integration benefits. See more.
|
| ARM 1176 in IBM SoI process demonstrates a cell-based flow |
09/10/2009 |
|
For several years it has been clear that SoI processes have a more favorable speed vs. voltage characteristic than comparable-node bulk silicon processes. This advantage can mean either lower operating voltage at a given speed---and thus lower power—or higher performance at a given voltage. And the presence of vast quantities of both the Xbox 360 and the PlayStation-3 should eliminate any question about volume manufacture, at least from IBM. So why is SoI still so rarely used?
The normal answer is the lack of design infrastructure. Early on, most SoI designs were at the high-performance fringe, and so people rightly associated SoI with custom design and highly-skilled teams. It would require new device models, new libraries, and new tools to make SoI work in a normal cell-based RTL flow, this reasoning said. See more.
|
| Building an SOI IP/EDA Infrastructure |
16/09/2009 |
|
As the SOI Consortium noted in a Design Automation Conference presentation, the SOI semiconductor ecosystem is expanding. Foundry support is available from Chartered, GlobalFoundries, Freescale, IBM, and UMC. SOI-ready libraries and silicon IP, memory IP, EDA tools and methodologies, and design services are all available from various providers. As the presentation notes, one tool that supports SOI implementation is the Cadence Encounter Digital Implementation System. See more.
|
| IBM Announces Highest Performance Embedded Processor for System-on-Chip Designs |
15/09/2009 |
|
IBM Corporation today announced the industry's highest performance, highest throughput processor for system-on-chip (SoC) product families in the communication, storage, consumer, and aerospace and defense markets.
LSI Corporation has collaborated with IBM on the development of the processor core, called the PowerPC® 476FP. LSI intends to utilize the 476FP PowerPC core in its next-generation multicore platform architecture for networking applications. See more.
|
| High-end server chips breaking records |
31/08/2009 |
How would you like a single-chip microprocessor with more than four times the performance (on some applications) of Intel's best Core i7?
Then consider that up to 32 of these chips can be directly connected to form a single server, achieving four times the built-in scalability of Intel's next-generation Nehalem-EX processor.
That's IBM's widely anticipated Power7, which it described at last week's Hot Chips conference. But if you're interested, you'd better be prepared to spend a lot more than four times as much per chip. IBM isn't talking about pricing, but large Power servers can cost more than $10,000 per processor. See more
|
| IBM's Power7 heats up server competition at Hot Chips |
24/08/2009 |
|
IBM Corp. may walk away from this week's Hot Chips conference with bragging rights to having the most muscular microprocessor with its Power7. The eight-core, 45nm chip is expected to set new watermarks in parallelism and cache that could translate into leading-edge performance for servers using it. See more
|
| Smaller, cheaper cell phones possible |
31/07/2009 |
|
Ph.D. candidate Sataporn Pornpromlikit played a critical role in research at UC San Diego that made a big impact at a recent conference, and might provide manufacturers with the means for making cell phones both smaller and cheaper. See more
|
| Chartered to start 32nm pilot runs in 4Q09, sources say |
31/07/2009 |
|
Chartered Semiconductor Manufacturing is scheduled to launch its 32nm process technology in the fourth quarter of 2009, and move to 28nm in the first half of 2010, industry sources have revealed. The Singapore-based foundry is expected to update its process advancement at an upcoming technology forum in Taiwan. See more
|
| MOSIS MARKS EXPANDED SEMICONDUCTOR FOUNDRY OFFERINGS WITH SHUTTLE RUNS FOR SILICON-ON-INSULATOR (SOI) |
28/07/2009 |
|
The MOSIS Service, a leading provider of
semiconductor fabrication solutions, today announced that it has expanded its relationship with IBM
to now include silicon-on-insulator (SOI) technology at multiple advanced lithography nodes. MOSIS
is offering IBM’s 45-nm SOI technology on 300mm wafers and IBM's 180-nm SOI technology on
200mm wafers. MOSIS customers now have a low-cost route to prototyping and low-volume
production with leading-edge SOI foundry technologies that provide enhanced performance and very
high integration capabilities. See more
|
| NXP Dual Channel Class-D Amplifiers Bring Power Efficient Concert Hall-Like Sound Into the Vehicle |
28/07/2009 |
|
EINDHOVEN, Netherlands--(BUSINESS WIRE)--NXP, the independent semiconductor company founded by Philips, today extended its leadership in vehicle audio entertainment, introducing a
new family of dual channel Class-D amplifiers that deliver cutting-edge
sound quality and energy efficiency. The new NXP TDF8599 Class-D
amplifier family operates with maximum output power from 70 – 130 watts
(250 watts mono), significantly reducing power dissipation in the
vehicle head-unit when compared to traditional Class-AB amplifiers and
ensuring more efficient heat management. See more
|
| Cadence Validates ARM Optimized Libraries for 45nm SOI Process |
27/07/2009 |
|
Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation, announced today that they have validated a new generation of ASIC libraries from ARM using the Cadence® Encounter® Digital Implementation System targeting IBM’s 45-nanometer silicon-on-insulator (SOI) manufacturing process. The development marks another milestone in a multiyear collaboration enabling efficient utilization of IBM’s low-power, high-performance SOI technology for next-generation designs. See more
|
| GlobalFoundries outlines roadmap, plans to break fab ground |
16/07/2009 |
Taking on UMC, TSMC and others, foundry startup GlobalFoundries Inc. has outlined its process roadmap and disclosed plans to break ground on its new U.S. fab by next week.
On July 24, the foundry startup will break ground on the fab. As previously reported, it plans a $4.5 billion, 300-mm fab in Malta in N.Y.'s Saratoga County that is expected to come online in 2012 with 35,000 wafer starts per month at full capacity. See more
|
| GlobalFoundries outlines roadmap, plans to break fab ground |
16/07/2009 |
Taking on UMC, TSMC and others, foundry startup GlobalFoundries Inc. has outlined its process roadmap and disclosed plans to break ground on its new U.S. fab by next week.
On July 24, the foundry startup will break ground on the fab. As previously reported, it plans a $4.5 billion, 300-mm fab in Malta in N.Y.'s Saratoga County that is expected to come online in 2012 with 35,000 wafer starts per month at full capacity. See more
|
| Thin SOI Devices Shine at VLSI Symposium |
18/06/2009 |
|
At the 2009 Symposium on VLSI Technology in Kyoto, Japan, an IBM R&D team described fully depleted CMOS devices created on extremely thin silicon-on-insulator (ETSOI) wafers, aimed at the 22 nm node and beyond. A Hitachi team presented SRAMs fabbed on ultrathin buried oxide SOI. Both avoided ion implantation steps. See more
|
| SOI Industry Consortium reinforces its academic and research support; three more prestigious universities join |
17/06/2009 |
|
The SOI Industry Consortium, an international group aimed at accelerating broad adoption of silicon-on-insulator (SOI) materials technology across semiconductor markets, announced today that it is reinforcing its academic and research support with the additions of three prestigious universities at the forefront of SOI applied research. Stanford University, University of California, Berkeley and Ritsumeikan University, Kyoto, Japan have all joined the consortium as academic members. See more
Download this press release in pdf format here
|
| Soitec’s 300mm ultra-thin SOI prepped for 22nm applications |
16/06/2009 |
|
The Soitec Group has completed development and qualification of its 300mm ultra-thin SOI (UTSOI) wafer platform for use in supporting fully-depleted device applications on the industry’s CMOS roadmaps for 22nm and beyond. The system is now ready to support mainstream ramp-up of fully depleted applications at the 22nm node, delivering a film thickness uniformity control of ± 5Å. See more
|
| Infineon and LS Industrial Systems Form Joint Venture to Forge Ahead in Molded Power Module Business for White Goods |
09/06/2009 |
|
The Korean company LS Industrial Systems and Infineon Technologies AG (FSE: IFX / OTCQX: IFNNY) today announced the establishment of the joint venture LS Power Semitech Co., Ltd. which will focus on the development, production and marketing of molded power modules for white good applications. The establishment of the joint venture paves the way for Infineon and LS Industrial Systems to more rapidly access the promising market for energy efficient household appliances, such as washing machines, refrigerators and air conditioners, and also for other low-power consumer and standard industrial applications. The use of variable-speed motors to reduce the energy consumed by household appliances is growing in response to regulatory requirements and consumer demand. Concurrently, smart design of drive control electronics to make best use of these motors presents manufacturers with further opportunities for efficiency and savings. See more
|
| Globalfoundries Demos 28nm, 32nm Wafers. |
04/06/2009 |
|
Globalfoundries, a joint venture between Advanced Micro Devices and Advanced Technology Investment Company, showed off its first wafers with logic produced using 32nm and 28nm process technologies. While existence of 32nm silicon-on-insulator wafers at Globalfoundries is hardly a surprise, bulk 32nm and 28nm wafers seems rather promising. See more
|
| Luxtera Announces Production Status of World’s First Commercial Silicon CMOS Photonics Fabrication Process |
03/06/2009 |
|
Luxtera, the worldwide leader in Silicon CMOS Photonics, today announced its collaboration with Freescale Semiconductor as its foundry source to achieve production of the world’s first commercial Silicon CMOS Photonics semiconductor manufacturing process. For a number of years, the companies collaborated on enhancing Freescale’s SOI CMOS semiconductor fabrication process, at its Austin, Texas manufacturing facility, to add photonic circuit capabilities to an existing 130nm electronics manufacturing process. This new photonically enabled CMOS fabrication process enables development and manufacturing of low cost Electro-Photonic Integrated Circuits (EPIC) bringing CMOS Photonics to mainstream markets ahead of the competition. Silicon CMOS Photonics is widely recognized as the key enabler of the next-generation of data-networking, computer, multi-core processor, and consumer electronics products. See more
|
| AMD Introduces Next Generation AMD Athlon™ II Processor, Adds Dual Core to Record-Setting AMD Phenom™ |
02/06/2009 |
|
Bringing its acclaimed 45nm technology to new high-volume processor designs, AMD announced two new dual-core desktop processors. Building on 10 years of AMD Athlon™ processor innovation, the new 45nm AMD Athlon™ II X2 250 processor gives mainstream consumers exceptional performance, efficiency and value. For enthusiasts and overclockers, AMD also announces the AMD Phenom™ II X2 550 Black Edition processor, the first ever dual-core AMD Phenom II CPU. With this latest addition to the AMD Phenom II processor family, users can now experience the power of AMD platform technology, codenamed “Dragon,” with dual-, triple- and quad-core configurations. See more
|
| New Six-Core AMD Opteron™ Processor Delivers Up to Thirty-Four Percent More Performance-per-Watt in Exact Same Platform |
01/06/2009 |
|
AMD announced availability of the world’s first six-core server processor with Direct Connect Architecture for two-, four- and eight-socket servers. Six-Core AMD Opteron™ processors (code-named “Istanbul”) extend AMD’s commitment to offering server customers superior value at every price point with unmatched platform flexibility. See more
|
| EUROSOI+ Balance of Activities |
11/05/2009 |
|
The main and last objective of EUROSOI+ Network is to establish Europe as the international scientific leader in Silicon on Insulator (SOI) Technology, Devices, Circuits and Systems. In this sense, the EUROSOI+ co-ordination efforts during this first year have been focused on the starting of those activities which contribute to improving the role of the European Semiconductor Industry with regard to SOI and to the knowledge that will enable Europe to compete internationally.
Now, after this first year EUROSOI+ has published a balance of activities summarized in the last volume of its monthly Newsletter (May 2009) which can be downloaded from here
|
| GlobalFoundries gears up |
07/05/2009 |
|
AMD's decision to spin off its manufacturing business into a separate entity has created a fairly unique event in semiconductor manufacturing: an ostensible newcomer has opened some of the world's most advanced chip fabrication capabilities to paying customers of all stripes. Last week, we traveled to the new offices of GlobalFoundries in Saratoga County, New York to meet with the firm's executives and to understand their plans for the newly minted chip foundry. See more
|
| AMD smashes the 7.1 GHz barrier with Phenom II 955 CPU! |
05/05/2009 |
AMD and Phenom II - everybody knows the name of current overclocking darling. Manufacturing wizards at GlobalFoundries tweaked up the 45nm SOI [Silicon-On-Insulator] with Silicon-Germanium material and enabled a flexible transistor design.
Combine that manufacturing skill with architectural improvements and the results are in: World Record for a multi-core CPU goes to Phenom II 955, originally clocked at 3.2 GHz. The team of overclockers in LimitTeam, consisted out of Sigh, Qooitry and Ultra40 overclocked the Phenom II 955 to 7,127.85 MHz, or 7.13 GHz, using a HyperTransport base clock of 250 MHz. See more
|
| CEA/Leti and IBM to Collaborate on Future Nanoelectronics Technology |
09/04/2009 |
CEA/Leti (the Electronics and Information Technology Laboratory of the CEA, based in Grenoble), and IBM today announced that they will collaborate on research in semiconductor and nanoelectronics technology.
This five-year agreement is focused on advanced materials, devices and processes for the development of complementary metal oxide semiconductor (CMOS) process technology for the production of microprocessors and integrated circuits at 22nm and beyond. See more
|
| Freescale speeds 45-nm processors to market for next-gen wireless equipment |
03/04/2009 |
At the Embedded Systems Conference in San Jose, this week, Freescale Semiconductor announced that it has begun sampling communications products based on 45-nm process technology to more than a dozen OEM customers for use in the development of next-generation 3G and 4G wireless infrastructure equipment.
The PowerQUICC MPC8569E processor, the dual-core QprlQP2020 device, and the six-core MSC8156 Star Core DSP devices were sent out for sampling recently. Customer validation activities have continued or are ahead of schedule and volume production is expected to begin by the end of 2009, according to the company. See more
|
| The SOI Industry Consortium announces key focus areas for 2009 |
17/03/2009 |
|
The SOI Industry Consortium, aimed at accelerating broad adoption of silicon-on-insulator (SOI) across semiconductor markets, announced today its key areas of focus for the current year: IP, low power, and the fabless community. These three pillars form the foundation upon which the consortium will orient both internal resources and external outreach. More specifically, the consortium will work to identify and close any remaining gaps in SOI-specific design IP, further quantify and promote the low-power advantages of SOI, and reach out to educate designers, particularly in the fabless community. See more
Download this press release in pdf format here
|
| IBM Ships 50 Millionth Processor for the Nintendo Wii Game System |
13/03/2009 |
IBM has announced that it has reached a significant milestone as the microprocessor supplier for Nintendo Co., Ltd., by completing the shipment of 50 million processors for the Wii(TM) game system, which has tremendous worldwide sales momentum.
IBM first began supplying the processors that serve as the digital heartbeat for Nintendo's Wii in 2006, as part of a multi-year, custom microprocessor design and production agreement. The chips are manufactured at IBM's advanced chip fabrication facility in East Fishkill, N.Y. IBM's worldwide supply chain supported consistent, dependable module deliveries and met strong consumer demand for the Wii console, including through three high-demand holiday seasons. See more
|
| LogicVision Announces Memory BIST & Repair Solutions for 45nm SOI Foundry Customers |
10/03/2009 |
|
LogicVision, Inc., a leading provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, today announced that IBM Corporation has included LogicVision’s ETMemory™ memory BIST and on-chip self-repair solution for embedded memory test and yield improvement within its advanced 45nm silicon-on-insulator (SOI) semiconductor foundry flow. The ETMemory solution will be recommended by IBM to its 45nm SOI customers to assist them in performing their own design work. See more
|
| GLOBALFOUNDRIES, World’s First Global Semiconductor Foundry Opens for Business |
04/03/2009 |
- GLOBALFOUNDRIES unlocks the combination of leading-edge technology and manufacturing efficiency with a global footprint to enable accelerated chip innovation
- New company to be headquartered in the US with over $6B in investments planned worldwide to expand manufacturing and technology capabilities
GLOBALFOUNDRIES, a new leading-edge semiconductor manufacturing company formed by a joint venture between AMD [NYSE: AMD] and the Advanced Technology Investment Company (ATIC), today announced its official launch and outlined plans to drive profound change and expand opportunities in the semiconductor industry. GLOBALFOUNDRIES is led by an experienced semiconductor management team, including CEO Doug Grose, formerly senior vice president of manufacturing operations at AMD, and Chairman of the Board Hector Ruiz, formerly executive chairman and chairman of the board at AMD. The Company is the only U.S. based global semiconductor foundry and commences operations with approximately 2,800 employees worldwide with headquarters in Silicon Valley. See more
|
| IMEC joins the SOI Industry Consortium |
23/02/2009 |
The SOI Industry Consortium, aimed at accelerating silicon-on-insulator (SOI) innovation into broad markets, announced today that IMEC has joined the organization as an academic member. IMEC is a world-leading independent nanoelectronics research center headquartered in Leuven, Belgium. It has been active in the field of SOI technologies for more that two decades.
“SOI has long been one of the key routes on IMEC’s roadmaps. In semiconductor technology, platform creation is of vital importance in making progress, creating critical mass, and identifying common interests between various players. That is what IMEC is doing, and that is what the SOI Industry Consortium is doing. We support the activities of the consortium and look forward to moving forward together,” says Luc Van den hove, Chief Operating Officer and Executive Vice President of IMEC. See more
Download this press release in pdf format here
|
| Green tech drives ICs beyond silicon |
09/02/2009 |
The green technology era will drive semiconductor innovations in and beyond silicon across a wide variety of applications, according to Rene Penning de Vries, chief technology officer of NXP Semiconductors in a keynote at the International Solid State Circuits Conference (ISSCC) here.
"The electronics industry has grown by focusing on productivity and using power as a resource in a formula that has resulted in tremendous success in consumer electronics, computing and communications," said De Vries. See more
|
| NXP unveils suite of efficient power supply products including GreenChip PFC and SR controllers |
04/02/2009 |
|
NXP Semiconductors, the independent semiconductor company founded by Philips, unveiled a suite of new power management solutions that will reduce power consumption in desktop PCs and laptops for the mass market. The highly efficient GreenChip PFC, GreenChip SR controllers and a portfolio of 30V power MOSFETs in LFPAK will be showcased at the Applied Power Electronics Conference (APEC) in Washington D.C. in February.
With this series of products NXP is demonstrating its continued investment in the development of more energy efficient solutions like the GreenChip family and the trend towards higher efficiency power, resulting in smarter ICs that enable energy saving in end products. “Every additional 1% increase in efficiency can make or break a product and we strive to lead the market in cost efficient, scalable products that are inevitably better for the environment by requiring less power and generate less heat resulting in a 20-30% improved efficiency.” said Edwin Kluter, marketing director, Power Solutions, NXP Semiconductors. See more
|
| Prestigious IEEE 2008 Cledo Brunetti Award Given to Michel Bruel of CEA-Leti |
16/12/2008 |
|
Soitec (Euronext Paris), the world’s leading supplier of silicon-on-insulator (SOI) wafers and other engineered substrates used in the microelectronics industry, reported that Dr. Michel Bruel is receiving today the 2008 Cledo Brunetti Award during a ceremony at IEDM in San Francisco. As a former researcher of CEA-Leti, one of Europe’s largest microelectronics research institutes, Dr. Michel Bruel is receiving this prestigious award for inventing the Smart Cut™ layer transfer technology that enabled widespread adoption of SOI for CMOS circuits, and the Soitec success story. Today, Smart Cut technology is supported by over 2000 patents worldwide owned both by CEA-Leti and Soitec, and accounts for 95% of all SOI production wafers. See more
|
| MOSIS announces IBM's SOI technology |
15/12/2008 |
|
IBM’s 12SO 45nm SOI process technology available in low volume MPW service.
The MOSIS Service announced the availability of multiple project wafer (MPW) low volume fabrication services using IBM’s sixth generation silicon on insulator (SOI) 12SO technology. System on chip designers (SoC) requiring integration, high speed and low power consumption will now have access to the 45 nanometre CMOS SOI process. Aimed at large SoC applications requiring a high gate count, the SOI technology provides low leakage and higher performance improvement, typically 30%, when compared to bulk silicon. Power reduction gain is in the range of 40%. See more
|
| Leading design house joins the SOI Industry Consortium |
11/12/2008 |
|
The SOI Industry Consortium, aimed at accelerating silicon-on-insulator (SOI) innovation into broad markets, announced today that Time To Market (TTM) Inc., an ASIC design and embedded software services company based in San Jose, California has joined the SOI Industry Consortium. TTM is a fully owned subsidiary of Infotech Enterprises Ltd (IEL), a global technology solutions provider headquartered in India. TTM has completed over 125 ASIC projects for leading electronics companies in the consumer, networking, and communications markets, and is well positioned to leverage SOI for low-power applications across all markets, especially in India’s chip design and services sector. See more
Download this press release in pdf format here
|
| SOI Goes Mainstream |
20/11/2008 |
The crossover for system on insulator (SOI) versus bulk CMOS was supposed to happen at the 22nm, but that was before software developers ran into problems programming multicore chips.
For years, SOI was considered the high-performance cousin of CMOS—more expensive, more difficult to manufacture and unnecessary for most applications. It is the heart of the Cell processor, for example, which drives Sony’s Playstation 3, the latest versions of digital televisions and some network appliances that need the benefits of always-on active power.
But with the persistent problems of writing general-purpose applications that can scale with multicore processors, SOI is quietly gaining more mainstream appeal. By running either faster or cooler—or both—it can provide the performance gains that multicore chips would provide if the software could take advantage of all the cores. See more
|
| IC downturn in 'unknown territory,' says Soitec CEO |
14/11/2008 |
As the economic crisis continues to wreck havoc on the market, the IC industry is looking down the abyss and attempting to make sense of the stormy climate.
Some compare the current IC cycle to the horrific downturn in 2001, which saw business drop like a rock amid the ''dot.com'' collapse. Some believe the current IC downturn is worse than 2001--a chilling thought that portends vast losses, layoffs and changes in the chip and fab-tool landscape. Still others indicate it's a media creation and that business is looking up.
Most are bracing for the worst. "This is not a traditional downturn," said one industry veteran, Andre-Jacques Auberton-Herve, president, CEO and chairman of Soitec SA (Bernin, France), a supplier of wafers for silicon-on-insulator (SOI) applications. See more
|
| Tech Roundup: IBM Opens Foundry |
12/11/2008 |
|
There are foundries in the world, about 20 or so, that manufacture chips for chip design companies. Now IBM is joining the ranks with some interesting competitive advantages. One is that it already runs a 45 nanometer process — not the most leading edge, but pretty darned advanced. Another is offering a silicon-on-insulator process instead of the standard CMOS. Translated, it means lower power consumption and higher performance and more chips from a single silicon wafer, which means lower per unit costs. AMD’s foundry spin-off will likely join the ranks, as it, too, offers 45 nm SOI. (Why spin it off if it would only process chips for AMD?) And all this cuts a key technological advantage that Intel has enjoyed, making the industry’s future interesting, if more difficult to predict. See more
|
| New IBM 45 nm SOI foundry could open new doors for small devices |
11/11/2008 |
|
A wealth of new handsets, netbooks, and high-volume CE devices could be enabled in the coming year by a key innovation IBM announced yesterday: a service in which it builds low-power composite design chips using ready-made IP libraries.
With the handset and small device space being opened up by new platforms such as Android, mobile Linux, and the royalty-free Symbian, opportunities are arising for more vendors -- some of them major players, some of them newer ones -- to come to market with fairly high-performance hardware. But up until recently, the possibility of making a high-performance handset was out of reach for many vendors, including the smaller ones that can't yet even afford completely custom design. See more
|
| Big Push for SOI |
10/11/2008 |
|
IBM and ARM are teaming up to simplify silicon-on-insulator chip development, cutting the time it takes to bring SOI to the next process node and making it more competitive with CMOS.
The big advantage is that SOI is significantly more energy-efficient than CMOS. But the complexity of developing in SOI has deterred many companies. With increasing pressure on electronics companies to reduce the energy consumption of devices, both IBM and ARM see a major opportunity.
“It’s been hard for companies to see past the challenges of learning a whole new design methodology,” said Joanne Itow, managing director at Semico Research. “They all think SOI has too many idiosyncrasies. ARM’s support provides a significant amount of credibility. And the timing is right. If a company starts a design now, they can have a product ready when 45nm reaches a sweet spot in terms of volume and pricing at the foundries.” See more
|
| IBM’s New Foundry Service Takes on Intel |
10/11/2008 |
IBM today said it will offer a new foundry service that could enable a startup to compete on the same level as Intel. IBM says it will make 45-nanometer, silicon-on-insulator chips designed by other other semiconductor companies as a contract manufacturer. This means everyone from startups to Texas Instruments can now design high-performance chips that can consume less power — ushering in new designs for consumer electronics, cell phones and maybe even servers.
As it becomes ever more expensive for semiconductor companies to build manufacturing plants to make their own chips, there are plenty of foundry services out there. However, IBM has combined two important manufacturing technologies to make this offering unique. One is the process node, which affects how many chips can be crammed onto a wafer. Smaller process nodes, such as 45 nanometer, offer better power efficiency (or performance) and better economies of scale. The other technology is silicon-on-insulator (SOI), which is more expensive than the traditional CMOS process. Foundries offering SOI technology typically do so at larger nodes, such as at 90 nanometers, where it’s hard to justify the higher cost of SOI when a chipmaker may be able to get the same cost efficiencies or performance and power gains by going to a smaller process node with CMOS chips. See more
|
| IBM intros 45-nm SOI foundry offering, maintains SOI competitive benefits to bulk CMOS |
10/11/2008 |
|
While some industry players have argued against SOI because of its higher cost when compared to bulk CMOS, IBM has been encouraging SOI since the 1990s when it first began commercially shipping the technology in its server products. The announcement of immediate availability of the semiconductor industry’s first 45-nanometer (nm) Silicon on Insulator (SOI) foundry offering follows the introduction of IBM’s 45-nm Cu-45 ASIC SOI offering to customers a year ago. The Cu-45 saw IBM break tradition and step away from bulk CMOS for the high-speed version of the ASIC, while keeping with CMOS for the standard and low-power versions of the technology. See more
|
| ARM Announces Industry’s First Silicon-On-Insulator Physical IP Library For IBM’s New 45nm SOI Foundry |
10/11/2008 |
|
ARM announced the industry’s first Silicon-on-Insulator (SOI) physical IP library including standard cell, memory and I/O libraries for IBM’s fully enabled 45nm SOI foundry. As lower power levels and increased system-on-chip (SoC) performance become more difficult to achieve with a traditional bulk CMOS process, SOI technology enables up to 30 percent better performance and 40 percent power savings at existing process nodes. The ARM® SOI library of physical IP is the only design platform of its kind in the industry and promises to significantly ease implementation of SOI technology and bring the benefits of this emerging process to a much wider range of semiconductor companies. See more
|
| IBM Extends Reach of Silicon on Insulator Technology Beyond Traditional High-End Applications |
10/11/2008 |
|
IBM announced immediate availability of the semiconductor industry’s first 45-nanometer (nm) Silicon on Insulator (SOI) foundry offering. The new offering adds industry-standard design tools and libraries to the intellectual property (IP) already available through IBM’s existing SOI development infrastructure, and allows a wide range of client designs to take advantage of SOI’s benefits. IBM testing has shown the potential for 45nm SOI to offer up to 30 percent performance improvement or 40 percent power reduction when compared to the industry-standard bulk complementary metal-oxide (CMOS) technology. See more
|
| The SOI Industry Consortium announces first general members' forum |
06/11/2008 |
|
The General Member’s Forum was held at the TechMart in Santa Clara, California on November 11, 2008. The SOI Industry Consortium Forum is designed to further the consortium’s mission of accelerating silicon-on-insulator (SOI) innovation into broad markets by promoting the benefits of SOI technology and reducing the barriers to adoption. See more
Download this press release in pdf format here
|
| Freescale in 45nm SOI production |
10/10/2008 |
Freescale is bringing out its first 45nm Silicon On Insulator (SOI) products and says it will be one of the first companies to use 32nm SOI processes.
"We're bringing up the first 45nm SOI products as we speak", said Rich Beyer, Chairman and CEO of Freescale at the Freescale Technology Forum 2008 in Paris this week. The first 45nm products are network processors. Compared to bulk CMOS, SOI adds 30 per cent more performance at the same level of power dissipation, or 30 per cent less power for the same level of performance. See more
|
| AMD and Advanced Technology Investment Company of Abu Dhabi to Create New Leading-Edge Semiconductor Manufacturing Company |
07/10/2008 |
|
AMD and the Advanced Technology Investment Company (ATIC) of Abu Dhabi today announced the creation of a U.S.-headquartered, leading-edge semiconductor manufacturing company to address growing demand for independent, leading-edge foundry production capabilities. The new global company, to be temporarily called “The Foundry Company”, will serve this need by combining advanced process technology, industry-leading manufacturing facilities and aggressive plans to expand its global capacity footprint. At the same time, the Mubadala Development Company will increase its current investment in AMD to 19.3 percent on a fully diluted basis. See more
|
| e2v hits twice with new dual-core integrated processors for extended-reliability applications |
06/10/2008 |
e2v announced today the availability of two dual-core integrated processors. The PC8641D and the PC8572 are extended-reliability versions of the MPC8641D and MPC8572 from Freescale Semiconductor, the latest and fastest high-reliability devices born of the long-standing partnership between e2v and Freescale Semiconductor.
These two dual-core devices were designed to service massive data processing embedded applications, including radars, flight computers and graphic displays, where reliability over severe environmental conditions is a key success factor. Both products are manufactured on Freescale Semiconductor’s 90nm silicon-on-insulator (SOI) CMOS process technology. See more
|
| The SOI Industry Consortium launches SOI Implementation Guide |
16/09/2008 |
|
The SOI Industry Consortium, focused on accelerating silicon-on-insulator (SOI) innovation into broad markets, announced today the availability of the first chapters of its SOI Implementation Guide. The SOI Implementation Guide features a series of white papers and presentations from industry experts on specific topics to promote a common understanding of the value and challenges of SOI. See more.
Download this press release in pdf format here
|
| Diversity in MEMS Processing |
29/08/2008 |
|
Diversity is good, but is more diversity better? Diversity enables a species to survive, it weeds out dead-end developments, and it's a source of seemingly infinite improvement. So is more better? Not always, at least from a processing/production point of view. Let's look at MEMS: how many processes already exist or are proposed as production technologies? Does every MEMS product have its own technology as some believe? Is it good to have such diversity in MEMS processing? Is the MEMS world becoming more or less diversified in terms of technology? To find answers to these questions, over 110 MEMS processes from established MEMS suppliers have been analyzed, start ups, universities, etc. Surprisingly, from all these products only a few (7) can be regarded as product/company unique. The rest can be more or less easily divided into standardized process techniques. See more
|
| 'Pretouch,' wireless energy: Intel CTO surveys tech future |
21/08/2008 |
|
Intel Corp. is celebrating its 40th anniversary in 2008, and Intel CTO Justin Rattner devoted his keynote address at the Intel Developer Forum on Thursday (Aug. 21) to "what the next 40 years of technology might look like.", "I'm addressing how we expect to see the gap between human intelligence and machine intelligence close over the next 40 years," said Rattner. See more
|
| THE SOI INDUSTRY CONSORTIUM WELCOMES A KEY IP SERVICES PROVIDER |
31/07/2008 |
|
The SOI Industry Consortium announced today that Symmid Semiconductor Technology (SST), based in Silicon Valley, California, a provider of ASIC design services and intellectual property (IP) porting, has joined the organization as a technical member. With the addition of SST, the SOI Industry Consortium now comprises 24 leading companies from across the electronics industry covering a spectrum of users, enablers, suppliers and manufacturers. This new addition complements the IP focus of the SOI Industry Consortium. See more
Download this press release in pdf format here
|
| Market for SOI to reach $1,1B by 2012, VLSI Research reports |
30/07/2008 |
Although 2008 sales of SOI are expected to be slightly down from 2007, the following years will see double-digit growths stimulated by the 45-nm transition by existing SOI users along with potential new customers.
Following the general trend of the semiconductor manufacturing ecosystem, sales of SOI (silicon on insulator) technology slowed in 2007 to a 6% year-over-year revenue increase at $654 million. The single-digit growth pales in comparison to the 46% and greater growth in each of the three previous years, according to to Santa Clara, Calif-based VLSI Research Inc. See more
Download this report in pdf format here
|
| NVIDIA JOINS THE SOI INDUSTRY CONSORTIUM |
16/07/2008 |
|
The SOI Industry Consortium announced today that NVIDIA, the world leader in visual computing technologies, has joined the organization. The SOI Industry Consortium, which was formed in October 2007 by a group of leading companies from across the electronics industry, is aimed at accelerating silicon-on-insulator (SOI) innovation into broad markets by promoting the benefits of SOI technology and reducing the barriers to adoption. See more
Download this press release in pdf format here
|
| Soitec announces new generation of advanced substrates |
15/07/2008 |
|
Soitec, the world’s leading supplier of silicon-on-insulator (SOI) wafers and other engineered substrates used in the microelectronics industry, has announced today a new generation of advanced substrates that support all the applications and architectures on the industry’s sub-45 nm roadmap. New solutions such as ultra-thin top silicon and ultra-thin Buried OXide (BOX) give device architects and designers complete flexibility in their choice of substrates for partially depleted (PD) and fully-depleted (FD) devices, including multi-gate transistor architectures See more.
|
| CISSOID introduce a new High Temperature Logic Family |
04/07/2008 |
|
CISSOID is a Fabless Semiconductor company, leader in High Temperature Electronics. We develop and sell Integrated Circuits (IC) designed for the highest reliability in the widest range of temperatures. Our products will operate at least from -55°C to +225°C. They have been tested from -200°C to +300°C. The reliability of CISSOID products is based on long years of experience in silicon technologies, design for reliability, assembly techniques and test. See more.
|
| Semiconductor companies eye SOI advantages and obstacles |
29/06/2008 |
|
Fabless semiconductor suppliers are interested in silicon-on-insulator (SOI) because the technology allows power savings, but they remain concerned about costs, lack of silicon intellectual property (IP), and availability of EDA tools, according to a survey conducted by the Global Semiconductor Alliance (GSA) in cooperation with the SOI Consortium. The survey identified obstacles that must be overcome for wider SOI adoption. See more.
|
| Intel explores floating-body cells on SOI |
17/06/2008 |
|
The big question is whether Intel is finally endorsing silicon-on-insulator (SOI) technology, as the company will describe the world's smallest FBC-based planar device on SOI for possible use at the 15-nm node. In related paper, Intel is also expected to describe new adaptive circuit techniques for SRAM cache cells. Both technologies are in R&D and still in the lab, it was noted. See more.
|
| Selete Achieves 5 GHz Pulses on Silicon Photonics IC |
05/06/2008 |
|
Optical interconnects using an optical fiber and on-chip light guide are being developed as interconnects in servers, circuit boards, and on silicon chips, leveraging advantages such as higher speed transmission and lower power consumption. To that end, the Selete (Tsukuba, Japan) consortium said it has succeeded in transmitting a 5 GHz pulse waveform through a 4 mm light guide produced on a silicon IC. The consortium made the announcement at the recent Selete Symposium 2008 More
|
| GLOBAL INDUSTRY SURVEY RESULTS REFLECT STRONG INTEREST IN SOI FOR LOW POWER AT MAINSTREAM TECHNOLOGY NODES |
03/06/2008 |
|
The Global Semiconductor Alliance (GSA), an organization focused on accelerating the growth of the global semiconductor industry, and the SOI Industry Consortium, a group of leading companies throughout the electronics industry focused on accelerating silicon-on-insulator (SOI) innovation into broad markets, today jointly announce the completion of a global study focused on SOI. More
Download this press release in pdf format here
|
| IBM Unveils Three Energy-Efficient Servers Powered by Quad-Core AMD Opteron™ Processors |
28/05/2008 |
|
AMD today announced growing industry support for the Quad-Core AMD Opteron™ processor among global OEMs continues with IBM’s launch of three updated System x™ servers. Designed to address customer priorities such as energy efficiency, performance, scalability, and virtualization, the Quad-Core AMD Opteron processor-based servers from IBM offer an exceptional power-efficient platform for today’s most demanding datacenters. More
|
| Timing not right for 450mm, says AMD's Grose |
20/05/2008 |
|
Describing the present macro-economic picture as "pretty bleak," Grose gave a nod to the cost that equipment and material suppliers must carry in making a wafer size change a reality. "Distribution of profit across our industry is really not equitable. We all know that we can't create shareholder value without the equipment and software and materials suppliers and neither can they," Grose said. "So what sense does it really make to pursue an industry strategy that's not really a win-win for everybody? The last thing in the world we need right now is to starve our suppliers. That's obviously like shooting ourselves in the foot." More
|
| Lab News: CEA-LETI reports on FD-SOI technology developed for the 32nm node and beyond. |
14/05/2008 |
|
A Fully Depleted SOI CMOS technology has been developed at CEA-LETI for Low Power applications at 32nm nodes and below.
For years, fully depleted devices have been considered as electrostatic boosters due the fact that they benefit from smaller short channel effects than regular Bulk devices.More
|
| From the Foundry: TSMC Reports Industry-Leading Performance |
14/05/2008 |
|
The world’s biggest foundry says its 45nm SOI process technology for the newest generation of high performance CPUs is the best in terms of speed, energy and density in chips using standard nitrided oxide for the gate dielectric. More
|
| 45th Design Automation Conference Panels Cover Industry’s Varied Interests, Challenges, Direction, Future |
13/05/2008 |
|
The 45th Design Automation Conference (DAC) will include 29 Technical Program and Pavilion panels over a four-day period, covering a variety of topics and trends related to the design of chips and embedded software.
DAC will be held June 8-13, 2008 at the Anaheim Convention Center in Anaheim, Calif. Details are available here. Read the full article.
|
| Honeywell Announces New High Temperature Analog Silicon Chip for Aerospace and Deep Drilling Operations |
05/05/2008 |
|
Honeywell (NYSE: HON)
announced today that its Aerospace business has unveiled a new high
temperature Silicon On Insulator electronic component with dual
applications in the aerospace and oil industries.More.
|
| Rambus Announces IBM to License Multi-protocol Serdes |
22/04/2008 |
|
Rambus Inc., one of the world's premier technology licensing companies specializing in high-speed memory architectures, today announced that IBM has licensed Rambus' multi-protocol SerDes (Serial/Deserializer) cell designed for advanced networking, server and general ASIC applications. This sophisticated multi-protocol SerDes cell provides IBM with a high-performance and low-power solution for implementation on its 45nm silicon-on-insulator (SOI) technology.More.
|
| Honeywell debuts ASICs, memory circuits in rad-hard SOI process |
08/04/2008 |
|
Honeywell International's microelectronics products group is introducing rad-hard ASICs and memory at this week's National Space Symposium. These bring space-based VLSI circuits to densities and performance usually seen in commercial CMOS. The HX5000 ASIC line also is the first rad-hard ASIC to have a dedicated design-tool environment, developed jointly by Honeywell and Synopsys Inc.More.
|
| THE SOI INDUSTRY CONSORTIUM WELCOMES MAGMA AS A NEW MEMBER |
10/03/2008 |
|
The SOI Industry Consortium announced today that Magma® Design Automation Inc. (Nasdaq: LAVA), a provider of chip design software, has joined the organization as a technical member. With the addition of Magma, the SOI Industry Consortium now comprises 21 leading companies from across the electronics industry covering a spectrum of users, enablers, suppliers and manufacturers. The intitiative is aimed at accelerating silicon-on-insulator (SOI) adoption in a wide range of markets by promoting the benefits of SOI technology and reducing the barriers to adoption.More.
Download this press release in pdf format here
|
| AMAT joins SOI consortium |
20/02/2008 |
|
The SOI Consortium, formed last fall to expand and accelerate usage of silicon-on-insulator (SOI) has added another big-name member: Applied Materials, joining nearly two dozen other firms to tout the technology's performance and power consumption benefits to a wider audience of end users.More.
|
| SOI INDUSTRY CONSORTIUM ANNOUNCES FIRST BOARD OF DIRECTORS’ ELECTION RESULTS |
15/01/2008 |
|
The SOI Industry Consortium, aimed at accelerating silicon-on-insulator (SOI) innovation into broad markets, announced today its first board of directors’ election results. At the same time the board named Horacio Mendez as the executive director of the newly formed organization.More.
Download this press release in pdf format here
|
| AMD Athlon Dual-core, goes 65nm SOI Technology |
15/12/2006 |
|
Building on AMD's 90nm low-power Silicon-on-Insulator technology, AMD's 65nm SOI technology takes full advantage of our 90nm high-performance technology, scalability and power efficiency. The move to 65nm allows for reductions in line widths which enable AMD to produce more processors on a 300mm wafer, for increased production capacity. As a result, AMD can deliver high output volumes and enhanced products for its customers. AMD's 65nm processes have evolved from a technology agreement with IBM that has been highly beneficial to AMD. More.
|
| Atmel Launches SOI driver Ics for Automotive |
16/10/2006 |
|
SOI Technology Allows Chip Temperatures of up to 200 degrees C
and Ambient Temperatures of up to 150 degrees C. More
|
| IBM to launch Power6 SOI chip at 5GHz |
10/10/2006 |
|
IBM Corp. is all set to bring out a 65-nm Power6 server chip running at 5GHz in mid-2007. The Big Blue said the processor is intended for use in financial and high-performance computing like airplane design and automotive crash simulation. More
|
| Soitec launches new Singapore SOI fab |
28/08/2006 |
|
Silicon-on-insulator (SOI) wafer specialist Soitec started work Monday (Aug. 28) on a new 300-mm fab here that the firm's head said will play a key role in its growth strategy. See more.
|
| 32-nm CMOS begins to take shape |
20/07/2006 |
|
At the Semicon West conference in San Francisco in July, the dim outlines of 32-nm CMOS began to take shape. The process will look more familiar to design teams than many had predicted, but the process is still far from business as usual. Pacing the still-tentative discussion of 32-nm technology, Applied Materials proclaimed that 32-nm processes would continue to use planar MOSFETs. This claim represents a major change from conventional wisdom, which declares that the 32-nm process signifies the dawn of the 3-D, multigate transistor. FinFETs, trigate MOSFETs, and fully depleted SOI (silicon-on-insulator) devices were all aiming to hit the mainstream at this process node. See more.
|
| New Method Detects Silicon Thin-Film Defects |
18/07/2006 |
|
High-performance strained-silicon semiconductor devices have advantages over other types of semiconductors, and also a big problem: the manufacturing process can cause hard-to-find crystal defects that can bunch together and degrade the wafer's performance. But a sensitive new x-ray imaging technique can help manufacturers avoid leaving clusters of defects known as "pile-ups" in finished semiconductors. See more.
|
| Soitec to build 300-mm facility in Singapore |
06/07/2006 |
|
Silicon-on-insulator (SOI) wafer supplier Soitec SA said Thursday (July 6) it plans to build a new production plant in Singapore and expand its existing production base in France.
Soitec said it selected Singapore as the site for a new 300-mm SOI fab, to be known as Fab 3. The company plans to invest €350 million (about $446.5 million) to build and equip a 4,000-square-meter cleanroom facility. The company said it expects to break ground on the project next month and to start production there in mid-2008. Once fully ramped up, Soitec said, the plant is expected to have the capacity to produce 1 million wafers per year and is expected to employ about 500 people. See more.
|
| Plastics extrusion pressure SOI sensor life extended |
04/07/2006 |
|
SensorsONE announces a new innovative development from Gefran which is the Impact Melt Pressure Sensor. The Impact has no mercury or oil filling, which are the fluids that are typically used to fill the capillaries of traditional melt pressure sensors to isolate the sensing element, which cannot operate at the very high process temperatures used in plastics extrusion machines. The Impact incorporates a silicon on insulator (SOI) strain gauge sensing element which can withstand very high temperatures without any need for capillary isolation which degrades the accuracy, stability and sensitivity of the sensing element. See more.
|
| Japanese Inventors Develop Ion Implantation Method |
22/06/2006 |
|
Hiroyuki Ito and Yasuhiko Matsunaga, both of Narita, Japan, have developed an ion implantation method, a silicon-on-insulator (SOI) wafer manufacturing method and an ion implantation system.
According to the U.S. Patent & Trademark Office: "The present invention provides an ion implantation method which can achieve sufficient throughput by increasing a beam current even in the case of ions with a small mass number or low-energy ions, an SOI wafer manufacturing method, and an ion implantation system." See more.
|
| Freescale Pushes SSOI CMOS to 45nm |
13/06/2006 |
|
Freescale Semiconductor has claimed an advanced CMOS technology that uses strained silicon-on-insulator (SOI) substrates for the 45nm level.
The technology, to be demonstrated this week at the 2006 VLSI Symposium on Technology and Circuits, is made possible by hybrid strain techniques. According to Freescale, transistors based on the technology exhibit performance increases greater than 30 percent over conventional technology and can reduce active power consumption by more than 40 percent while maintaining performance levels. See more.
|
| AMD sets out quad-core stall |
02/06/2006 |
|
AMD has revealed plans to bring quad-core chips to the market by mid-2007.
The multi-core processors will be available for servers, workstations and high-end desktops.
AMD will use its 65nm Silicon-on-Insulator process to build the new chips, which reduces current leakage by placing an insulating layer between the silicon and the transistor. See complete here
|
| SOI Can Reduce Overall Manufacturing Costs |
23/05/2006 |
|
Depending on the product, technology, and process technology, the use of silicon-on-insulator as a substrate can reduce the cost of ownership for chip making by up to 40 percent.
That’s the conclusion of a new analysis by Semico Research Corp. and is contrary to the common wisdom about the costs associated with the use of SOI, a technology considered one of the best available today for making chips that offer high performance without the heat and power penalties that occur when using a standard substrate. Read complete article.
|
| AMD Unveils Dual-Core SOI Chips for Mobile Computers |
17/05/2006 |
|
Advanced Micro Devices on Wednesday unveiled its first dual-core mobile processors and also its first chips to support DDR2 memory. The new Turion 64 X2 processors provide the power of two processing engines and 64-bit capability at the same time, something, which Intel’s Core Duo lacks. Several system makers already announced plans to use the new chip from AMD.
“AMD is first to market with the only 64-bit dual-core mobile processor, driving the wave of next-generation mobile platforms that are ready today to run the upcoming 64-bit version of Microsoft Windows Vista,” said Chris Cloran, vice president, AMD mobile division. See more
|
| Industry's highest performance programmable SOI DSP |
16/05/2006 |
|
SAN JOSE, Calif.--(BUSINESS WIRE)--May 16, 2006--Freescale Semiconductor (NYSE:FSL) (NYSE:FSL.B) has introduced its third-generation multicore DSP based on next-generation SC3400 StarCore(TM) technology. The new MSC8144 DSP is engineered to deliver leading-edge performance, reduce system costs and significantly increase channel densities for next-generation wireline and wireless infrastructure applications providing voice, video and data services.
The MSC8144 provides an optimal DSP solution for wireline infrastructure applications, such as carrier-class trunking, enterprise VoIP media gateways and video conferencing servers. Wireless applications served by the MSC8144 include wireless voice transcoding and IP multimedia subsystem (IMS) gateways, video multi-point conferencing units, baseband cards for 3G, Super 3G and WiMax basestations, and Layer 2 processing in radio network controllers (RNCs). See more
|
| New Supercomputing Center To Advance the Science of Nanotechnology |
11/05/2006 |
|
Rensselaer Polytechnic Institute, in collaboration with IBM and New York state, has announced a $100 million partnership to create the world’s most powerful university-based supercomputing center, and a top 10 supercomputing center of any kind in the world.
The Computational Center for Nanotechnology Innovations (CCNI), based on the Rensselaer campus and at its Rensselaer Technology Park in Troy, N.Y., is designed both to help continue the impressive advances in shrinking device dimensions seen by electronics manufacturers, and to extend this model to a wide array of industries that could benefit from nanotechnology, according to the partners. See more
|
| Start-Up's Clock Innovation Offers 75% Power Savings |
10/05/2006 |
|
Stealth-mode start up, Multigig Inc., has unveiled a new on-chip clock technology that it says offers 75 percent power savings, even as on-chip clock speeds increase.
Companies such as Intel and AMD have stopped relying on increasing clock speed to enhance performance because the technique also increases heat, leakage and the need for power. That’s why they have moved to dual-core and multi-core technologies. See more
|
| Scientist develops SOI technology to prolong pacemaker |
27/04/2006 |
|
A California-based Indian scientist claimed to have developed a new technology that can revolutionise the functioning of electronic devices such as pacemaker (used in people with defective heart) by making them smaller and last for almost 30 years. The technology "Silicon on Insulator" (SOI) has been developed by Dr Amar Pal Singh who has set up a company. See more
|
| Xbox 360 to get 65 nm SOI processor in 2007 |
26/04/2006 |
|
Microsoft has seemingly reached an agreement with Chartered Semiconductor to provision the Xbox 360 with a 65 nm processor in 2007. This will provide the console with a more powerful and less power-hungry processor. Tech specs for the chip have yet to be announced, but it should be based on silicon-on-insulator (SOI) technology. See more
|
| Scientists fashion semiconductors into flexible membranes |
10/04/2006 |
|
University of Wisconsin-Madison researchers have demonstrated a way to release thin membranes of semiconductors from a substrate and transfer them to new surfaces-an advance that could unite the properties of silicon and many other materials, including diamond, metal and even plastic. See more
|
| CSMA working on the EU funded ATOMICS nano devices programme |
04/04/2006 |
|
CSMA are working with several European companies on the EU funded project, “ATOMICS”. ATOMICS is intended to establish predictive models for front-end processes of nano devices involving low-temperature and millisecond-annealing strategies and the use of silicon-germanium-carbon alloys, strained silicon, and silicon-on-insulator for simulating the processing of future nanotechnology devices.
See more
|
| Synchronous gains for notebooks |
01/04/2006 |
|
Philips is claiming a three to five per cent efficiency gain in notebook computer adapter designs using its GreenChip SR family of secondary-side synchronous rectifier controllers.
The TEA1761 and TEA1762 are the only secondary control ICs available to integrate both synchronous rectification and primary feedback/control functionality, all in one, said the firm. See more
|
| X-Fab, 1st Silicon enter top 10 with foundry merger |
28/03/2006 |
|
Controlling shareholders of X-Fab Semiconductor Foundries, Erfurt, Germany, and Malaysia's 1st Silicon Sdn. Bhd. have agreed to merge, creating a foundry with combined manufacturing capacity of approximately 700,000 wafers/year ( 200mm-equivalent), and more than $300 million in sales. See more
|
| Soitec commits $420M for new 300mm SOI fab |
20/03/2006 |
|
Soitec, a French manufacturer of silicon-on-insulator wafers, said it is
building a new 300mm fab to boost output by nearly 40% to 1.0 million
wafers/month. See more here.
|
| Ibis Tech. announces customer acceptance of Oxygen Implanter |
13/03/2006 |
|
Ibis Technology Corporation (Nasdaq NM: IBIS), a leading provider of SIMOX-SOI implantation equipment to the worldwide semiconductor industry, today announced final customer acceptance of the Ibis i2000 oxygen implanter that was ordered by Sumitomo Mitsubishi Silicon Corporation (SUMCO), the world's second largest silicon wafer manufacturer. The implanter was ordered in January 2005 and shipped to that customer in Japan in June 2005. See more.
|
| Tiny Via ULV mobile processor targets UMPCs |
10/03/2006 |
|
Via is shipping an ultra-low-voltage processor claimed to have the highest performance-per-Watt, smallest packaging, and fastest cryptographic engine of any available x86-compatible processor. The "C7-M ULV" supports clock speeds from 1GHz to 1.5GHz, with power requirements between 3.5 and 7.5 Watts. It measures 21mm square, and targets UMPCs (ultra mobile PCs) and other compact, portable devices. See more
|
| IBM's latest design will be built on 65nm SOI |
07/03/2006 |
|
At the ISSCC (International Solid-State Circuits Conference) in San Francisco, IBM revealed some information about its upcoming POWER6 microprocessor, and the claims are nothing short of awe-inspiring (see our previous coverage). If everything remains on track as reported, IBM looks to take the high-end server market by storm in 2007 with a 5.6GHz CPU release, providing significantly greater performance than Intel's high-end Itanium 2 products and pretty much anything else in the server market for single-unit, general computing. See more.
|
| Car makers start using SOI for on-board chips |
03/03/2006 |
|
As people have begun expecting more and more leisure comfort from their automobile purchases these days, the need for an enhanced semiconductor environment is becoming acute. We have cars today with dedicated networks transferring data back and forth throughout the vehicle. While these networks operate somewhat differently than your typical PC or even at-home network, they still have similar fundamental principles. But it is the differences that have had car makers turning to SOI to help solve a problem or two. See more
|
| Chalmers Nanofabrication Laboratory: Free European access |
22/02/2006 |
|
One of the most advanced university cleanrooms in the world, the
Nanofabrication Laboratory, at the Department of Microtechnology and
Nanoscience, MC2, at Chalmers University of Technology, in Göteborg, Sweden,
is now offering European Universities and SME:s access, free of charge, to
advanced micro- and nanotechnology fabrication resources. See morehere.
|
| G965, 1946G Nextgen Intel chipsets exposed |
20/02/2006 |
|
HKEPC has some very saucy information about forthcoming Intel Technology. First the next IGP from Intel. the G965 - not i965G - will be SM3.0 compatible, bringing it to the same level as the X300. Other stuff will include MPEG2 hardware acceleration and a HDMI interface. There's also plenty on the ICH8 south bridge and the i946G MCH which will support the 800MHz Conroe family and is probably aimed at the entry level rather than top end. See more
|
| Hitachi launches smallest RFID chip yet |
09/02/2006 |
|
(From www.soisic.com): Hitachi has just unveiled the world’s smallest RFID chip, the Hitachi µ-Chip. It has a 0.15x0.15 mm dimension and a negligible thickness of 7.5 micrometers. The current RFID standard size is at 0.4x0.4mm which, by the way, and is also produced by Hitachi.......The considerable size reduction of the chip was made possible by Silicon-on-Insulator (SOI) technology. The development resulted in an increase in RFID chip production of up to ten-folds since the size cut multiplied the number of chips that can be fabricated per wafer. See more
|
| Study Explains Unexpected Conductivity of Nanoscale Silicon |
09/02/2006 |
|
A team of UW-Madison engineers has shown that when the surface of nanoscale silicon is specially cleaned, the surface itself facilitates current flow in thin layers that ordinarily won't conduct — a potentially significant development for nanotechnology application. See complete article
|
| Soft errors low on SOI memory |
23/01/2006 |
|
Innovative Silicon Inc. (ISi), a startup company that has developed a single-transistor silicon-on-insulator (SOI) memory it calls Z-RAM for zero capacitor RAM, said it has shown that its technology is less susceptible to soft errors than SRAM and comparable with embedded-DRAM. It added that it expects to have 65-nanometer samples of its memory later in the first quarter. See more
|
| AMD licenses Innovative Silicon's SOI memory |
20/01/2006 |
|
LONDON — Microprocessor company Advanced Micro Devices Inc. has signed a technology license for "floating-body" silicon-on-insulator (SOI) memory developed by startup company Innovative Silicon Inc. AMD (Sunnyvale, Calif.) said it is interested in the Z-RAM (zero capacitor) technology for use in its microprocessors. The embedded memory is a good fit with AMD, which has moved all its microprocessor production over to SOI manufacturing processes. ISi (Santa Clara, Calif.) has claimed that Z-RAM can achieve five times the density of embedded SRAM, the conventional memory choice for on-chip caches, and twice the density of embedded DRAM. See more at soisic.
|
| Axcelis Announces Launch of Optima HD Ion Implanter |
20/01/2006 |
|
Axcelis Technologies, Inc. (NASDAQ: ACLS) today announced the introduction of the Optima HD, the industry's only ion implanter designed to address traditional high dose implants as well as the expanding range of applications in sub-65nm generation device manufacturing. The system is the latest tool in Axcelis' versatile Optima implant family. Axcelis will unveil the Optima HD during a live Webcast at 10:00 a.m. ET on Tuesday, January 24, 2006. See more here
|
| Picogiga sales rocket as Soitec grows fast |
17/01/2006 |
|
GaN-on-silicon specialist Picogiga is on track to double sales revenue compared with last year. Picogiga, the French company that specializes in GaN-on-silicon material, is on track to double its annual sales. According to its parent company Soitec, which supplies silicon-on-insulator (SOI) wafers, in the nine months of the current fiscal year, Picogiga’s sales have grown by 76.5%. See more
|
| IBM, Sony, Toshiba Put Heads Together on Cell Chips |
13/01/2006 |
|
(From www.soisic.com) Cell chips have been incorporated into processor boards manufactured by Mercury Computer Systems, which are used by the Department of Homeland Security and for medical diagnostics. Also, Sony has committed to using the cell chip for PlayStation 3, which is supposed to start shipping this spring. See more
|
| AMD takes FX gaming processor dual-core, launches FX60 chip |
11/01/2006 |
|
(From www.soisic.com) Sunnyvale (CA) - AMD today added a new flagship to its gaming processor series. The FX-60 now sports two cores and clocks in at 2.6 GHz. The manufacturer promises up to 80% more performance over "similar" single-core processors. AMD also added two new mobile processors, the Turion ML-42 and ML-44, to its portfolio. See more here.
|
| New chip-making technology to boost processor performance |
14/12/2005 |
|
Advanced Micro Devices (AMD) and IBM unveiled new, 65–nm (nanometer) process technologies expected to lead to higher-performance, more power-efficient future microprocessors. In papers presented at the International Electron Devices Meeting (IEDM) last week, the two companies announced they have successfully combined embedded silicon germanium (e-SiGe) with dual stress liner (DSL) and stress memorization technology (SMT) on silicon-on-insulator (SOI) wafers to achieve a 40% increase in transistor performance compared to similar chips produced without stress technology, while controlling power consumption and heat dissipation. The new process technologies reduce interconnect delay through the use of lower dielectric constant insulators, which can improve overall product performance and lower power consumption. The technologies can be manufactured at the 65-nm generation and are scalable for use in future generations. See complete article here
|
| Toshiba builds 128-Mbit capacitorless DRAM on SOI wafer |
12/12/2005 |
|
Toshiba Corp. has fabricated a 128-Mbit capacitorless DRAM on an SOI wafer and verified operation of the chip. Toshiba reported on the 128-Mbit capacitorless DRAM design and result of the simulation at the International Solid State Circuits Conference (ISSCC) last February. At the International Electron Devices Meeting this week, Toshiba reported on the operation of the chip, claimed to be the largest density capacitorless DRAM fabricated. Capacitorless DRAM employs a floating body cell generated underneath of the gate insulator film to store data instead of a capacitor used in conventional DRAM. Some companies, such as Innovative Silicon Inc. and Renesas Technology Corp., announced prototypes in addition to Toshiba, which started researching the floating body cell memory in 2000. (From www.soiscic.com, see more here)
|
| ST improves NOR Flash and suggests heterojunctions to boost RF-CMOS |
07/12/2005 |
|
Europe's STMicroelectronics has lined up its contributions in 13 papers at this year's International Electron Devices Meeting (IEDM) in Washington, DC, (December 5-7, 2005). The company highlights its presentation of a 65nm NOR Flash technology with a cell size of 0.042 square micron, claimed as a ‘world's first'. The company also sees a heterojunction bipolar transistor (HBT) architecture as enabling development of low-cost, high-performance RF CMOS-based platforms. See more here.
|
| Z-RAM memory in FinFET/TriGate sub-45nm SOI devices |
29/11/2005 |
A new paper presented by Mikhail Nagoga, senior device engineer with Innovative Silicon Inc. (ISi) at the IEEE's SOI Conference in Honolulu; claims to prove the manufacturability of its Z-RAM(TM) (zero capacitor) embedded memory technology in FinFET and TriGate devices with geometries below 45nm. Z-RAM memory arrays have already been successfully demonstrated on silicon using partially depleted SOI structures, and the experimental results presented in ISi's new paper ensure that the technology will scale to 45nm and beyond.
In the recently-introduced Z-RAM floating body memory cell, the conventional storage capacitor is replaced by the body capacitance of a SOI MOSFET. The charge stored in the floating body affects the device threshold voltage through the body effect and can be used to distinguish two states. This eliminates the need for a capacitor element, so the resulting memory cell structure is based solely on a single transistor. Therefore, Z-RAM memories can achieve five times the density of embedded SRAM and twice the density of embedded DRAM designs.
See complete text here
|
| World's first SOI MOSFET with crystalline Gd2O3 |
29/11/2005 |
Researchers at AMICA have successfully fabricated the world's first MOSFETs on ultra-thin-body silicon-on-insulator (SOI) material with a crystalline gadolinium oxide (Gd2O3) gate dielectric. AMICA researchers have been able to integrate - for the first time - crystalline gadolinium oxide in their experimental SOI CMOS technology platform. These devices are utilized to generate important data for the evaluation of these novel promising materials. The films have been grown at partner University of Hannover. Experimental details will be presented at the forthcoming International Semiconductor Device Research Symposium (ISDRS) in Bethesda, USA.
See complete text at physorg.
|
| Capacitorless Twin-Transistor RAM |
23/11/2005 |
|
(Renesas Technology Corp, www.renesas.com). This high-density capacitorless twin-transistor RAM (TTRAM) achieves high-speed operation and low power consumption. The memory design allows fast, high-density storage to be embedded in power-efficient system-on-chip (SoC) devices built with 65nm generation and subsequent silicon-on-insulator (SOI) CMOS processes. In a 2-Mbit chip fabricated with a 130nm SOI-CMOS process, the TTRAM achieves 250MHz operation in continuous data output mode and 133MHz in random access operation, while dissipating an active power of 148mW, nearly 43% less than a conventional 130nm CMOS process embedded DRAM. See more at Nikkei Electronics Asia
|
| Analog Devices : High-speed ADC with SOI technology |
18/11/2005 |
Analog Devices Inc. (NYSE: ADI), a global leader in high-performance semiconductors for signal processing applications, is announcing the industry's first differential amplifier (diff amp) to achieve the ultra low distortion levels needed to efficiently drive the high-speed analog-to-digital converters (ADCs) required by today's advanced wireless infrastructure systems. The latest addition to ADI's extensive portfolio of radio frequency (RF) components, the AD8352 is designed to drive 12- to 16-bit ADCs at the highest practical intermediate frequencies (IF) used within next generation 3G and 4G cellular and broadband WiMAX wireless infrastructure equipment. The AD8352 is capable of maintaining exceptional performance when driving high-speed ADCs up to 380 MHz, far exceeding the 100 MHz achieved by competing diff amps.
The ultra low distortion of the AD8352 at higher operating frequencies (82-dBc HD3 at 180 MHz) is achieved by a proprietary internal cancellation scheme, and the use of XFCB-3(TM), ADI's specialized silicon germanium (SiGe) silicon-on-insulator (SOI) process technology. Along with ultra low distortion, the AD8352 delivers high linearity (41-dBm OIP3), draws only 37 mA of quiescent current, and is packaged in space saving 3 mm x 3 mm LFCSP. See more
here.
|
| SOISIC: First-time-right silicon from 90nm SOI tape-outs |
09/11/2005 |
|
SOISIC today announced it has successfully produced six working integrated circuits from 90-anometer Silicon-on-Insulator tape-outs to qualify the industry’s first Customer-Owned-Tooling (COT) design kit. The devices were produced on Freescale Semiconductor’s advanced SOI process technology and provide fabless ASIC designers a clear path to seamlessly migrate their CMOS-based designs onto an SOI process to achieve better performance and lower power consumption for their chips. See more
|
| IBM Details Production Of Xbox 360 CPU |
01/11/2005 |
Officials from IBM have discussed details of its CPU for the Xbox 360 at the Fall Processor Forum in San Jose, California, revealing that chips for the Xbox 360 are now in full production at both the company’s East Fishkill factory in New York state and at Chartered Semiconductor Manufacturing in Singapore.
Much of the information on the chip, which features a customized version of IBM's 64-bit PowerPC core, is already known - however, the company noted that the chip was designed and developed by IBM and Microsoft specifically for the Xbox 360, and was delivered in less than 24 months from the original contract signing in the autumn of 2003, being developed at multiple IBM locations including Rochester, Minnesota; Austin, Texas; and Raleigh, North Carolina.
The chip includes three cores, each with two simultaneous threads and clock speeds greater than 3 GHz. It features 165 million transistors and is fabricated using IBM's 90 nanometer Silicon on Insulator (SOI) technology to reduce heat and improve performance. The chip's 21.6 GB/s Front Side Bus (FSB) architecture was customized to meet the throughput and latency requirements of the Xbox 360 software.
"Microsoft's aggressive timetable required that IBM take the Xbox 360 chip design from concept to full execution in just 24 months," said Ilan Spillinger, IBM Distinguished Engineer and director of the IBM Design Center for Xbox 360. "IBM's success in delivering the chip to meet Microsoft's worldwide launch illustrates our commitment to innovative processor design that builds on IBM's wealth of intellectual property."
See moore
|
| IBM readies 90nm SOI chip for Microsoft's product |
31/10/2005 |
|
IBM Corp. in the US and Singapore's Chartered Semiconductor are now in production of their 90nm silicon-on-insulator-based microprocessor to be included in Microsoft's Xbox 360 console. The chip is built on three IBM 64bit PowerPC cores, each operating at 3.2GHz with 1MB shared L2 cache and a front-side bus with aggregated bandwidth of 21.6GB/sec. SST .
|
| AMD opens 65 nm Fab 36 in Dresden |
18/10/2005 |
|
Dresden (Germany) - AMD is on a roll these days. Market shares, according to analysts, are climbing and even sales hold up to the firm's marketing as the company was able to outsell Intel in US retail in September. Last week, the company officially opened its second chip factory in Dresden, Germany. The new Fab 36 is located next to the firm's Fab 30 and was built to produce silicon-on-insulator (SOI) processors in 65 nm technology on 300 mm wafers - while Fab 30 cranks out 90 nm chips on 200 mm wafers.See more at The SOI Semiconductor IP Provider
|
| Oki E. develops transistor that reduces consumption by 90% |
07/10/2005 |
Oki Electric Industry Co. Ltd. has announced the development of
SOI-CMOS, a new device structure for super low off-leakage current.
While maintaining the speed of performance of previous devices, this
transistor reduces the standby consumption current (off-leak current)
by over 90% compared to previous transistors. Oki claims to be the
first company to develop a fully depleted SOI transistor using a
non-doped body and non-overlap type SOI structure.
See more at
Solid State Technology
|
| Zarlink Introduces World's Fastest Commercially Bipolar SOI |
05/10/2005 |
SWINDON, United Kingdom. Zarlink Semiconductor
(NYSE/TSX:ZL), today introduced a fully complementary SOI (Silicon On
Insulator) bipolar foundry technology designed to meet the high
performance requirements of DVD (digital versatile disk) players,
digital video recorders, and ADSL (asynchronous digital subscriber
line) modems. Building on its complementary SOI bipolar technology,
Zarlink developed the new "HSA" process specifically for high-voltage,
high-speed analog products. With "HSA", Zarlink is offering the
industry's fastest commercially available SOI bipolar process capable
of cost-effectively fabricating this challenging class of products.
See more at The SOI Semiconductor IP Provider
|
| Freescale, Soitec tweak sSOI for sub-65nm nodes |
18/04/2005 |
Freescale Semiconductor Inc., Austin, TX, and Soitec Group, Bernin, France, say they have achieved a 70% increase in electron mobility with strained silicon-on-insulator (sSOI) engineered substrates aimed for use with sub-65nm devices, as well as "high compatibility" with existing SOI CMOS processes. Electrical reliability data showed no difference between standard SOI and sSOI, with no observed relaxation of the strained silicon at 40nm geometries.
The collaborative effort was launched two years ago to evaluate sSOI as a potential base material for sub-65nm devices. Initial work utilized silicon germanium-on-insulator, followed by sSOI. Source SST .
|
| European collaboration will use SOI for MEMS fabrication |
11/04/2005 |
|
In Solid State Technology of April 01 there is an article about a "New technology developed by QinetiQ, Malvern, UK, is to be used by Tronic's Microsystems SA, Crolles, France, for the volume production of innovative micro-electromechanical system (MEMS) devices". View the article in SST page.
|
| Public reports |
30/03/2005 |
|
There are 2 public versions of D3 (Preliminary State of the Art Report) and D5 (Preliminary "Who is Who" Guide) availables from this site.
|
| Deliverables publication |
30/03/2005 |
|
Now Deliverables from D1 to D7 and D15 (new) are availables from Member Zone.
|
|
Number of visits: 340557
Pages viewed: 35640
|
